MSR AG VHDL-AMS, 10/07/00
Tasks of Working Group VHDL-AMS
• Development of model examples
• implementation of models in VHDL-AMS
• exchange of models including test bench and documentation
• exchange of experiences concerning simulation results
 of different tools (stability, computation time etc.)
•
• Evaluation of tools for converting SPICE, MAST, … to VHDL-AMS
•
• Definition of a subset of VHDL-AMS for Real-time applications
  (VHDL-AMS-RT) to model plants tool independently
•
• Cooperation with tool developer (Avant!, ETAS, Mathworks,
  Mentor Graphics, …)
•
• Building of an MSR library and package